导师图形公司
(纳斯达克:MENT)宣布进一步增强和最优化ns to the Calibre platform and Analog FastSPICE (AFS) platform by completing TSMC 10nm FinFET V1.0 certification. In addition, the Calibre and Analog FastSPICE platforms are ready for early design starts and IP design on TSMC’s 7nm FinFET process based on the most current Design Rule Manual (DRM) and SPICE model.
To help mutual customers prepare their designs for advanced manufacturing processes, Mentor has made improvements for 10nm physical verification, accelerating the runtime of the Calibre nmDRC sign-off toolcompared to the tool’s runtime when it was initially certified for required 10nm accuracy last year. New device parameters of the 10nm process are supported in the Calibre nmLVS tool for more accurate SPICE models and self-heating simulation. Mentor has also enhanced the parasitic accuracy in the Calibre xACT solution, and is actively improving layout parasitic extraction flow to meet 10nm requirements.
口径平台还可以帮助设计师提高设计可靠性和制造性。提供的TSMC可靠性利用了Caliber PERC可靠性验证解决方案,现在采用增强的10nm电阻和电流密度检查的技术。对于制造设计(DFM),导师为Caliber fordenhancer工具的SmartFill功能增加了颜色感知填充和更复杂的对齐和间距规则。导师还优化了Calibre DesignRev芯片饰面工具,Calibre RVE结果查看器和赛车实时界面,以使设计人员更容易地集成和调试功能,以实现多模式,布局与原理图(LVS)比较以及电气规则检查(ERC)和电气规则检查(ERC)和电气规则检查(ERC)和电气可靠性验证。
Mentor和TSMC现在正在合作将口径平台的广泛功能带入7NM FinFET流程。Calibre NMDRC和Caliber NMLVS工具已经获得了客户早期设计的认证。TSMC和Mentor正在扩展使用SmartFill功能和能力多理解功能,以支持7NM的技术要求。
对于快速,准确的电路模拟,TSMC认证了AFS平台,包括AFS Mega电路模拟器,为10nm v1.0。AFS平台还获得了最新版本的7NM DRM,并获得了早期设计的香料。
包括Olympus-Soc系统在内的Mentor Place and-Route平台已得到增强,以支持10nm的高级设计规则,而Mentor正在优化其与签名提取和静态时正时正时正时正时正时正时正时正时正时正时正时正时正式分析工具的优化。这项合作也已扩展到7nm。
Mentor Graphics
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